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Processor register
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#	Item
11	LINUX for S/390 ELF Application Binary Interface Supplement Add to Reading List Source URL: download.boulder.ibm.com Language: English - Date: 2006-02-15 12:55:13 Computing Computer architecture Software Subroutines Application binary interface Loader Call stack Linux kernel Processor register Stack Operating system Portable Executable
12	E cient Software-Based Fault Isolation Robert Wahbe Steven Lucco Thomas E. Anderson Add to Reading List Source URL: www.cs.cmu.edu Language: English - Date: 2003-04-04 15:00:43 Computing Computer architecture Computer engineering Central processing unit Instruction set architectures Assembly languages Processor register MIPS instruction set Instruction set Addressing mode Virtual memory CPU cache
13	Lecture 4: Modeling Sparse Matrix-Vector Multiply William Gropp www.cs.illinois.edu/~wgropp Sustained Memory Bandwidth Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-15 10:20:20 Computing Software engineering Central processing unit Computer programming Computer memory Cache Programming languages CPU cache Sparse matrix Processor register Fortran Data
14	Grundzüge der Wirtschaftsinformatik Introduction to Business Information Systems GWI-HT2009 – Unit 7: Computer Software and Software Engineering Univ.-Prof. Dr. Martin Hepp Add to Reading List Source URL: www.ebusiness-unibw.org Language: English - Date: 2016-07-26 08:52:52 Computing Computer architecture Computer engineering Central processing unit Computer Machine code Processor register Data Instruction set Data General Nova Stack machine
15	CO1016 Computer Systems Credits: 20 Convenor: Dr. R. Crole Semester: 1st Add to Reading List Source URL: www.cs.le.ac.uk Language: English - Date: 2015-07-10 06:50:24 Computer architecture Computing Computer engineering Central processing unit MIPS instruction set Computer Multi-core processor Microarchitecture Instruction set Processor register Digital electronics 64-bit computing
16	MG_Boilerplate10-WP3b arial Add to Reading List Source URL: www.avant-tek.com Language: English - Date: 2014-07-31 22:34:01 Computing Computer architecture Computer engineering Computer memory Central processing unit Instruction set architectures Embedded microprocessors Random-access memory Cell ARC CPU cache Processor register
17	Microsoft Word - Quickstart guide to using Attendant.doc Add to Reading List Source URL: attendant.lboro.ac.uk Language: English - Date: 2011-09-22 10:09:33 User interface techniques Computing Central processing unit Computer architecture Computer engineering Point and click Processor register Double-click
18	∗ Taming the IXP Network Processor Lal George Network Speed Technologies, Inc Add to Reading List Source URL: people.cs.uchicago.edu Language: English - Date: 2009-07-14 15:46:38 Compiler optimizations Computing Central processing unit Operations research Computer engineering Computer hardware Computer architecture Processor register Register allocation Static single assignment form Integer programming CPU cache
19	Advanced Parallel Architecture Lesson 3 Annalisa Massini Von Neumann Architecture Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-03-03 11:00:54 Computing Central processing unit Computer engineering Computer hardware Computer architecture Classes of computers Vacuum tube computers Accumulator Processor register Computer Von Neumann architecture Instruction set
20	COMMUNICATION FORMAT FOR ADI PANEL AND MODICON PLC: Automation Displays control graphic panels can communicate using the Modbus ASCII data format as described in the Modicon Protocol Reference Guide PI-MBUS-300. You can Add to Reading List Source URL: www.adipanel.com Language: English - Date: 2016-01-21 16:18:47 Automation Computing Building automation Industrial Ethernet Modbus Engineering Control engineering Processor register